
Publications
Highlighted below are the MINDrelated conference and journal papers authored by the
MIND research team for each the 10 research projects:
Project: Modeling and analysis of tunnel transistors with NEMO/OMEN
Principal investigator: Gerhard Klimeck  Purdue
2012
S. S. Sylvia, H.H. Park, M. A. Khayer, K. Alam, G. Klimeck, and R. K. Lake,
"Material selection for minimizing direct tunneling in nanowire transistors,"
IEEE Trans. on Electron Dev., 59, 8, pp. 20642069, 2012.
M. Luisier, D. Mohata, S. Datta, D. Pawlik, Sean Rommel, Gerhard Klimeck, and W.S. Cho,
"Full band atomistic modeling of homojunction InGaAs bandtoband tunneling diodes including band gap narrowing,"
Appl. Phys. Lett., 100, 063504 (2012).
Z. Jiang, Y. Lu, Y. Tan, Y. He, M. Povoloskyi, T. Kubis, G. Klimeck, A. Seabaugh, and P. Fay,
"Atomistic simulation of GaSb/InAs tunneling field effect transistor,"
TECHCON, September 2012, Austin, TX.
Z. Jiang, Y. He, Y. Tan, M. Povoloskyi, T. Kubis, and G. Klimeck,
"Quantum transport in GaSb/InAs nanowire TFET with semiclassical charge density,"
poster, International Workshop on Computational Electronics (IWCE), May 2012, Madison, WI.
T. B. Boykin, M Luisier, N. Kharche, X. Jiang, S. K. Nahak, A. Martini, and G. Klimeck,
"Multiband tightbinding model for strained and bilayer graphene from DFT calculations,"
International Workshop on Computational Electronics (IWCE), May 2012, Madison, WI.
Y. He, L. Zeng, T. Kubis, M. Povolotskyi, and G. Klimeck,
"Efficient solution algorithm of nonequilibrium Green's functions in atmostic tight binding representation,"
International Workshop on Computational Electronics (IWCE), May 2012, Madison, WI.
2011
A. Paul, M. Luisier, and G. Klimeck,
"Influence of crosssection geometry and wire orientation on the phonon shifts in ultrascaled Si nanowires,"
J. Appl. Phys., 110, 094308 (2011).
A. Paul, M. Luisier, and G. Klimeck,
"Shape and orientation effects on the ballistic phonon thermal properties of ultrascaled Si nanowires,"
J. Appl. Phys., 110, 114309 (2011).
A. Paul and G. Klimeck,
"Strain effects on the phonon thermal properties of ultrascaled Si nanowires,"
Appl. Phys. Lett., 99, 083115 (2011).
M. Luisier, T. Boykin, and G. Klimeck,
"Atomistic nanoelectronic device simulations with sustained performances up to 1.44 Pflop/s,"
ACP/IEEE Gordon Bell Prize Competition, Supercomputing, Nov. 2011, Seattle, WA.
A. Paul, K. Miao, G. Hegde, S. Mehrotra, M. Luisier, and G. Klimeck,
"Enhancement of thermoelectric efficiency by uniaxial tensile stress in ntype GaAs nanowires,"
IEEE Nano 2011, August 2011, Portland, OR.
A. Paul, G. Tettamanzi, S. Lee, S. Mehrotra, N. Collaert, S. Rogge, and G. Klimeck,
"Interface trap density metrology from subthreshold transport in highly scaled undoped Si nFinFETs,"
J. Appl. Phys., 110, 121301 (2011).
S. Steiger, M. Povolotskyi, H.H. Park, T. Kubis, and G. Klimeck,
"NEMO5: A parallel multiscale nanoelectronics modeling tool,"
IEEE Trans. Nanotechnology. vol. 10, pp. 146474 (2011).
S. Steiger, M. Salmani, D. Areshkin, A. Paul, T. Kubis, M. Povolotskyi, H.H. Park, and G. Klimeck,
"Enhanced valence force field model for the lattice properties of galium arsenide,"
Phys. Rev. B., vol. 84, p. 155204 (2011).
G. C. Tettamanzi, A. Paul, S. Lee, S. R. Mehrotra, N. Collaert, S. Biesemans, G. Klimeck, and S. Rogge,
"Interface trap density metrology of stateoftheart undoped Si NFinFETs,"
IEEE Electron Device Lett., 32, 4, pp. 440442, 2011.
S. G. Kim, A. Paul, M. Luisier, T. B. Boykin, G. Klimeck,
"Full 3D quantum transport simulation of atomistic interface roughness in silicon nanowire FETs,"
IEEE Trans. on Electron Devices, 58, 5 pp. 13711380, 2011.
2010
W.S. Cho, M. Luisier, and G. Klimeck,
"Fullband simulations of bandtoband tunneling diodes,"
TECHCON, Sept. 2010, Austin, Texas.
S. Agarwal, G. Klimeck, and M. Luisier,
"Design ideas for leakage reduction in low power vertical tunneling fieldeffect transistors,"
IEEE Electron Device Lett., vol. 31, pp. 621623, 2010.
T. Boykin, M. Luisier, M. SalmaniJelodar, and G. Klimeck,
"Straininduced, offdiagonal, sameatom parameters in empirical tightbinding theory suitable for [110] uniaxial strain applied to a silicon parameterization,"
Phys. Rev. B, 81, 125202, 2010.
M. Luisier and G. Klimeck,
"Simulation of nanowire tunneling transistors: From the WentzelKramersBrillouin approximation to fullband phononassisted tunneling,"
J. Appl. Phys., 107, 084507, 2010.
2009
M. Luisier and G. Klimeck,
“Performance comparisons of tunneling fieldeffect transistors made of InSb, carbon and GaSbInAs broken gap heterostructures,”
International Electron Devices Meeting, Dec. 2009, Baltimore, MD.
M. Luisier and G. Klimeck,
“Investigation of In_{x}Ga_{1x}As ultrathinbody tunneling FETs using a fullband and atomistic approach,"
IEEE SISPAD, Dec. 2009, San Diego, CA.
M. Luisier and G. Klimeck,
“Atomistic fullband simulations of Si nanowire transistors with electronphonon scattering,”
Phys. Rev. B, 80, 155430, 2009.
B. P. Haley, S. Lee, M. Luisier, G. Klimeck, H. Ryu F. Saied, S. Clark, and H. Bae,
“Advancing nanoelectronic device modeling through petascale computing and deployment on nanoHUB,”
Proc. SciDAC Conference, June 2009, San Diego, CA, J. Phys: Conf. Ser. vol. 180, 012075 (16pp) doi: 10.1088/17426596/180/1/012075.
M. Luisier and G. Klimeck,
“Atmostic, fullband design study of InAs bandtoband tunneling fieldeffect transistors,”
Electron Device Lett., 30, 6, 2009.
M. Luisier and G. Klimeck,
“Performance analysis of statistical samples of graphene nanoribbon tunneling transistors with line edge roughness,”
Appl. Phys. Lett., 94, 223505, 2009.
M. Luisier and G. Klimeck,
“Performance limitations of graphene nanoribbon tunneling FETS due to line edge roughness,”
Device Research Conf., June 2009, University Park, PA.
A. Paul, S. Mehrotra, G. Klimeck, and M. Luisier,
“On the validity of the top of the barrier quantum transport model for ballistic nanowire MOSFETs,”
IEEE Proc. 13th International Workshop on Computational Electronics, May 2009, Beijing, China.
S. Mehrotra, M. Luisier, and G Klimeck,
“Surface and orientation dependence on performance of trigated silicon nanowire pMOSFETs,”
Proc. 7th IEEE Workshop on Microelectronics and Electron Devices, Apr. 2009, Boise, ID.
2008
M. Luisier and G. Klimeck,
“A multilevel parallel simulation approach to electron transport in nanoscale transistors,”
Supercomputing 2008, Nov. 2008, Austin TX.
M. Luisier and G. Klimeck,
“Fullband and atomistic simulation of n and pdoped doublegate MOSFETs for the 22 nm technology node,”
Int. Conf on Simulation of Semiconductor Processes and Devices, Sept. 2008, Hakone, Japan.
M. Luisier, N. Neophytou, N. Kharche, and G. Klimeck,
“Fullband and atomistic simulation of realistic 40 nm InAs HEMT,”
IEEE Int. Electron Devices Meeting, Dec. 2008, San Francisco, CA.
G. Klimeck and M. Luisier,
“From NEMO1D and NEMO3D to OMEN: Moving toward atomistic 3D quantum transport in nanoscale semiconductors,”
IEEE Int. Electron Devices Meeting, Dec. 2008, San Francisco, CA.
Project: Heterojunction pn tunnel fieldeffect transistors (TFETs)
Principal investigators: Patrick Fay, Tom Kosel, Alan Seabaugh, Mark Wistey, Grace Xing  Notre Dame
2012
T. Vasen, Q. Liu, M. S. Rahman, G. Zhou, Y. Lu, R. Li, Q. Zhang, D. C. Wheeler, C. Chen, N. Goel, C. Park, H. Zhu, J.M. Kuo, S. O. Koswatta, T. Kosel, M. Wistey, P. Fay, H. Xing, and A. Seabaugh,
"Selfaligned regrowth process for InGaAs tunnel fieldeffect transistors,"
submitted, IEEE Trans. on Electron Devices, 2012.
Q. Zhang, R. Li, R. Yan, T. Kosel, H. Xing, A. Seabaugh, K. Xu, O. A. Kirillov, D. J. Gundlach, C. A. Richter, and N. V. Nguyen,
"A unique photoemission method to measure semiconductor heterojunction band offsets,"
Appl. Phys. Lett., 102, 012101, 2013.
Q. Liu, L. Dong, Y. Liu, R. Gordon, P. D. Ye, P. Fay, and A. Seabaugh,
"Frequency response of LaAlO3/SrTiO3 alloxide fieldeffect transistors,"
SolidState Electronics, 76, 2012, 14.
G. Zhou, Y. Lu, R. Li, Q. Zhang, Q. Liu, T. Vasen, H. Zhu, J.M. Kuo, T. Kosel, M. Wistey, P. Fay, A. Seabaugh, and H. Xing,
"InGaAs/InP tunnel FETs with a subthreshold swing of 93 mV/dec and Ion/Ioff ratio near 10(6)
IEEE Electron Dev. Lett., 33, 6, pp. 78284, 2012.
Q. Zhang, G. Zhou, H. Xing, A. Seabaugh, K. Xu, S. Hong, O. Kirillov, C. Richter, and N. Nguyen,
"Tunnel fieldeffect transistor heterojunction band alignment by internal photoemission spectroscopy,"
Appl. Phys. Lett., 100, 102104, 2012.
R. Li, Y. Lu, G. Zhou, Q. Liu, S. D. Chae, T. Vasen, W. S. Hwang, Q. Zhang, P. Fay, T. Kosel, M. Wistey, H. Xing, and A. Seabaugh,
"AlGaSb/InAs tunnel fieldeffect transistor with oncurrent of 78 μA/μm at 0.5 V,"
IEEE Electron Device Lett., 33, 3 pp. 363365, 2012.
Y. Lu, G. Zhou, R. Li, Q. Liu, Q. Zhang, T. Vasen, S. D. Chae, T. Kosel, M. Wistey, H. Xing, A. Seabaugh, and P. Fay,
"Performance of AlGaSb/InAs TFETs with gate electric field and tunneling direction aligned,"
IEEE Electron Device Lett., 33,5 pp. 655657, 2012.
G. Zhou, R. Li, T. Vasen, M. Qi, S. Chae, Y. Lu, Q. Zhang, H. Zhu, J.M. Kuo, T. Kosel, M. Wistey, P. Fay, A. Seabaugh, and H. Xing,
"Novel gaterecessed vertical InAs/GaSb TFETs with record high Ion of 180 µA/µm at Vds=0.5 V,"
International Electron Devices Meeting, Dec. 2012, San Francisco, CA.
Q. Zhang, R. Li, T. Kosel, H. Xing, A. Seabaugh, K. Xu, O. A. Kirillov, C. A. Richter, D. J. Gundlach, and N. V. Nguyen,
"Band offsets of Al2O3 on InAs/AlGaSb heterojunction measured by internal photoemission,"
poster, IEEE Semiconductor Interface Specialists Conference, Dec. 2012, San Diego, CA.
A. Seabaugh,
"Tunnel fieldeffect transistor perspective,"
invited, International Symposium on Compound Semiconductors, August 2012, Santa Barbara, CA.
M. I. Shams, Y. Xie, Y. Lu, and P. Fay,
"An accurate Interband tunneling model for InAs/GaSb heterostructure devices,"
Int'l Symp. on Compound Semiconductors, Santa Barbara, CA, August 2012, Santa Barbara, CA.
Q. Zhang, Y. Lu, C. A. Richter, D. Jena, and A. Seabaugh,
"Analytic determination of the optimum bandgap for a tunnel FET,"
Device Research Conference, Late News, June 2012, University Park, MD.
T. Vasen, G. Zhou, R. Li, Y. Lu, S. D. Chae, M. Qi, Q. Liu, Q. Zhang, T. Kosel, M. Wistey, G. Xing, P. Fay, and A. Seabaugh,
"AlGaSb/InAs tunnel fieldeffect transistors,"
poster, INC8, May 2012, Tsukuba, Japan.
A. Seabaugh, S. D. Chae, P. Fay, S. Hu, D. Jena, G. Klimeck, T. Kosel, S. Kurtz, R. Li, Y. Lu, W. S. Hwang, M. Qi, B. SensaleRodriguez, T. Vasen, M. Wistey, H. Xing, Q. Zhang, and G. Zhou,
"Lowvoltage tunnel transistors: Benchmarking and circuits,"
invited, ICICDT, May 2012, Austin, TX.
A. Seabaugh, G. Bernstein, S. D. Chae, G. Csaba, S. Datta, P. Fay, S. Hu, D. Jena, G. Klimeck, T. Kosel, S. Kurtz, R. Li, Y. Lu, T. Mayer, V. Narayanan, M. Niemier, W. Porod, W. S. Hwang, T. Vasen, R. M. Wallace, M. Wistey, H. Xing, Q. Zhang, and G. Zhou,
"Post CMOS devices and architectures,"
invited, Government Microcircuits Applications and Critical Technology Conference (GOMAC), March 2012, Las Vegas, NV.
A. Seabaugh, S. Chae, P. Fay, T. Kosel, R. Li, Y. Lu, M. Qi, T. Vasen, M. Wistey, H. Xing, Q. Zhang, and G. Zhou,
"Compound semiconductor tunnel transistors,"
invited, NNIN Symposium on Frontiers in Nanoscale Transistors and Electronics, Feb. 2012, Santa Barbara, CA.
2011
S. D. Chae, G. Zhou, I. Kwihangana, R. Li, Y. Lu, Q. Liu, T. Vasen, Q. Zhang, W.S. Hwang, P. Fay, T. Kosel, M. Wistey, H. Xing, and A. Seabaugh,
"Characterization of interface traps in metal–highk–InAs/GaSb TFETs,"
IEEE Semiconductor Interface Specialists Conference (SISC), Dec. 2011, Arlington, VA.
Q. Zhang, G. Zhou, H. Xing, A. Seabaugh, K. Xu, O. Kirillov, C. Richter, and N. Nguyen,
"Band alignment of TFET heterojunctions and post deposition annealing effects by internal photoemission spectroscopy,"
ISDRS, Dec. 2011, College Park, MD.
A. Seabaugh, S. D. Chae, P. Fay, W. S. Hwang, D. Jena, S. Hu, T. Kosel, S. Kurtz, R. Li, Q. Liu, Y. Lu, T. Vasen, M. Wistey, H. Xing, Q. Zhang, and G. Zhou,
"Fulfilling digital logic requirements by tunnel transistors,"
invited, 2nd Symposium for Energy Efficient Electronic Systems, Nov. 2011, Berkeley, CA.
R. Li, Y. Lu, S. D. Chae, G. Zhou, Q. Liu, C. Chen, M. S. Rahman, T. Vasen, Q. Zhang, P. Fay, T. Kosel, M. Wistey, H. Xing, S. Koswatta, and A. Seabaugh,
"InAs/AlGaSb heterojunction tunnel fieldeffect transistor with tunnelling inline with the gate field,"
Physica Status Solidi C, 9, no. 2, pp. 389392 (2012).
G. Zhou, Y. Lu, R. Li, Q. Zhang, W. S. Hwang, Q. Liu, T. Vasen, C. Chen, H. Zhu, J.M. Kuo, S. Koswatta, T. Kosel, M. Wistey, P. Fay, A. Seabaugh, and H. G. Xing.
"Vertical InGaAs/InP tunnel FETs with tunneling normal to the gate,"
IEEE Electron Dev. Lett., 32, 11, pp. 151618, 2011.
A. Seabaugh, S. D. Chae, P. Fay, W. S. Hwang, T. Kosel, R. Li, Q. Liu, Y. Lu, T. Vasen, M. Wistey, H. Xing, G. Zhou, and Q. Zhang,
"IIIV tunnel fieldeffect transistors,"
invited, 220th ECS Meeting and Electrochemical Energy Summit, Oct. 2011, Boston, MA.
A. Seabaugh, S. D. Chae, P. Fay, W. S. Hwang, T. Kosel, R. Li, Q. Liu, Y. Lu, T. Vasen, M. Wistey, H. Xing, Q. Zhang, G. Zhou, and R. Wallace,
"Interface traps and low subthreshold swing in IIIV tunnel FETs,"
invited, AVS Symposium, Oct. 2011, Nashville, TN.
A. Seabaugh,
"Fundamentals and current status of steepslope tunnel fieldeffect transistors,"
invited, 41st European SolidState Device Research Conference (ESSDERC), September 2011, Helsinki, Finland.
T. Vasen, Q. Liu, M. S. Rahman, G. Zhou, Y. Lu, R. Li, C. Chen, Q. Zhang, N. Goel, C. Park, J.M. Kuo, H. Zhu, S. Koswatta, D. Wheeler, P. Fay, H. Xing, T. Kosel, M. Wistey, and A. Seabaugh,
"Lateral In0.53Ga0.47As Tunneling FieldEffect Transistor with regrown, selfaligned tunnel junction by Molecular Beam Epitaxy,"
TECHCON, Sept. 2011, Austin, TX.
G. Zhou, Y. Lu, R. Li, Q. Zhang, W. Hwang, Q. Liu, T. Vasen, H. Zhu, J. Kuo, S. Koswatta, T. Kosel, M. Wistey, P. Fay, A. Seabaugh, and H. Xing,
"Selfaligned InAs/Al0.45Ga0.55Sb vertical tunnel FETs,"
Device Research Conf., pp. 205206 (2011).
G. Zhou, Y. Lu, R. Li, W. Hwang, Q. Zhang, Q. Liu, T. Vasen, H. Zhu, J. Kuo, S. Koswatta, T. Kosel, M. Wistey, P. Fay, A. Seabaugh, and H. Xing,
"Passivation effects of ALD oxides on selfaligned In0.53Ga0.47As/InAs/InP vertical tunnel FETs,"
Electronic Materials Conf., June 2011, Santa Barbara, CA.
A. Seabaugh, G. Bernstein, P. Fay, D. Jena, P. Kogge, T. Kosel, S. Hu, J. Nahas, M. Niemier, W. Porod, H. Xing, S. Datta, T. Mayer, V. Narayanan, G. Klimeck, and R. Wallace,
"Nanoelectronics Research Initiative,"
invited, International Nanotechnology Conference on Communication and Cooperation (INC7), May 2011, Albany, NY.
R. Li, Y. Lu, G. Zhou, Q. Liu, C. Chen, M. S. Rahman, T. Vasen, Q. Zhang, P. Fay, T. Kosel, M. Wistey, H. Xing, S. Koswatta, and A. Seabaugh,
"InAs/AlGaSb heterojunction tunnel FET with InAs airbridge drain,"
International Symposium on Compound Semiconductors (ISCS 2011) pp. 189190.
G. Zhou, Y. Lu, R. Li, Q. Liu, P. Pinsukanjana, G. Wang, T. Kosel, M. Wistey, P. Fay, A. Seabaugh, and H. Xing,
"Selfaligned In_{0.53}Ga_{0.47}As/InP vertical tunnel FET,"
CS Mantech, May 2011, Palm Springs, CA.
A. Seabaugh, P. Fay, T. Kosel, R. Li, Q. Liu, Y. Lu, T. Vasen, M. Wistey, H. Xing, Q. Zhang, and G. Zhou,
"IIIV tunnel FETs,"
invited, WOCSEMMAD, February 2011, Savannah, GA.
2010
A. C. Seabaugh and Q. Zhang,
"Lowvoltage tunnel transistors for beyondCMOS logic,"
Proc. IEEE, vol. 98, 20952110, 2010.
S. O. Koswatta, S. J. Koester, and W. Haensch,
"On the possibility of obtaining MOSFETlike performance and sub60 mV/decade swing in 1D brokengap tunnel transistors,"
IEEE Trans. on Electron Devices, vol. 57, no. 12, 2010.
Q. Zhang, Y. Lu, H. Xing, S. Koester, and S. Koswatta,
"Scalability of atomicthinbody (ATB) transistors based on graphene nanoribbons,"
IEEE Electron Device Letters, 31, 6, 2010.
G. Zhou, J. Zhu, P. Pinsukanjana, Y.C. Kao, T. Kosel, P. Fay, M. Wistey, A. Seabaugh, and H. Xing,
"Regrown InGaAs tunnel junctions for TFETs,"
Electronic Materials Conf., June 2010, Notre Dame, IN.
Y. Lu, A. Seabaugh, P. Fay, S. J. Koester, S. E. Laux, W. Haensch, and S. O. Koswatta,
"Geometry dependent tunnel FET performance: Dilemma of electrostatics vs. quantum confinement,"
Device Research Conf., June 2010, Notre Dame, IN.
Y. Lu, A. Seabaugh, H. Xing, T. Kosel, S. Koswatta, J. Zhu, K Clark, J.M. Kuo, P. Paul, and P. Fay,
"Effect of aluminum comparison on currentvoltage characteristics of AlGaSb/InAs tunnel junction,"
Electronic Materials Conf., June 2010, Notre Dame, IN.
A. Seabaugh,
"Tunnel fieldeffect transistors  status and prospects,"
invited, Device Research Conf., June 2010, Notre Dame, IN.
A. Seabaugh,
"Narrow bandgap tunnel fieldeffect transistors for logic,"
invited, Int. Symp. Compound Sem., June 2010, Kagawa, Japan.
2009
S. Kabeer, T. Vasen, D. Wheeler, Q. Zhang, S. Koswatta, H. Zhu, K. Clark, J.M. Kuo, Y.C. Kao, S. Corcoran, B. Doyle, P. Fay,
T. Kosel, H. Xing, and A. Seabaugh,
“Effect of dopant profile on currentvoltage characteristics of p+n+ In_{0.53}Ga_{0.47}As tunnel junctions,”
International Semiconductor Device Research Symposium, Dec. 2009, Baltimore, MD.
G. Zhou , S. Kabeer, D. Wheeler, A. Seabaugh, and H. G. Xing,
“Field modulation in heavilydoped thinbody p+InGaAs for tunnel FETs,”
International Semiconductor Device Research Symposium, Dec. 2009, Baltimore, MD.
D. Wheeler, S. Kabeer, Y. Lu, T. Vasen, Q. Zhang, G. Zhou, K. Clark, H. Zhu, Y.C. Kao, P. Fay, T. Kosel, H. G. Xing, and
A. Seabaugh,
“Fabrication approach for lateral InGaAs tunnel transistors,”
International Semiconductor Device Research Symposium, Dec. 2009, Baltimore, MD.
S. O. Koswatta, S. J. Koester, and W. Haensch,
“1D brokengap tunnel transistor with MOSETlike Oncurrents and sub60mV/dec subthreshold swing,”
Int. Electron Devices Meeting, Dec. 2009, Baltimore, MD.
A. Seabaugh, D. Jena, T. Fang, P. Fay, S. Kabeer, T. Kosel, Y. Lu, S. Koswatta, K. Tahy, T. Vasen, D. Wheeler, H. Xing, Q. Zhang,
G. Zhou, J.M. Kuo, P. Pinsukanjana, H. Zhu, and Y.C. Kao,
“Lowsubthresholdswing tunnel transistors,”
Silicon Nanoelectronics Workshop, June 2009, Kyoto, Japan.
2008
Q. Zhang, S. Sutar, T. Kosel, and A. Seabaugh,
“Fullydepleted Ge interband tunnel transistor: Modeling and junction formation,”
Solid State Electronics, 53, 3035, 2008.
Q. Zhang and A. Seabaugh,
“Can the interband tunnel FET outperform Si CMOS?,”
Device Research Conf., June 2008, Santa Barbara, CA.
Project: Heterojunction pin tunnel transistor logic and architectures
Principal investigators: Suman Datta, Vijay Narayanan, Theresa Mayer  Penn State
2013
M. Cotter, H. Liu, S. Datta, and V. Narayanan,
"Evaluation of tunnel FETbased flipflop designs for low power, high performance applications,"
Internation Symposium on Quality Electronic Design, March 2013, Santa Clara, CA.
2012
R. Bijesh, D. Mohata, A. Ali, and S. Datta,
"Insight into the output characteristics of IIIV tunneling field effect transistors,"
submitted, Appl. Phys. Lett., 2012.
R. Bijesh, D. K. Mohata, Y. Zhu, M. D. Hudait, Z. Jiang, G. Klimeck, Q. Zhang, O. Kirillov, W. Li, N. V. Nguyen, D. Gundlach, J. Suehle, J. M. Fastenau, D. Loubychev, W. K. Liu, T. S. Mayer, and S. Datta,
"Experimental demonstration of pchannel GaSb homojunction and InAsGaSb brokengap heterojunction tunnel FET,"
submitted, Symposium on VLSI Technology, 2013.
D. K. Mohata, R. Bijesh, T. Mayer, J. Fastenau, D. Lubyshev, A. K. Liu, and S. Datta,
"Barrier engineered arsenideantimonide heterojunction tunnel FETs with enhanced drive current,"
IEEE Electron Device Lett., vol. 33, no 11, pp. 1568, 2012.
Y. Zhu, N. Jain, D. K. Mohata, S. Datta, D. Lubyshev, J. M. Fastenau,A. K. Liu, and M. K. Hudait,
"Structural properties and band offset determination of pchannel mixed As/Sb typeII staggered gap tunnel fieldeffect transistor structure,"
Appl. Phys. Lett. 101, 112106, 2012.
L. Liu and S. Datta,
"Scaling length theory of double gate interband tunnel fieldeffect transistor,"
IEEE Trans. on Electron Dev., 59, 4 pp. 902908, 2012.
C. Y. Wang, V. Saripalli, S. Datta, Y. Xie, and V. Narayanan,
"An areaefficient mapping approach to reconfigurable singleelectron transistor arrays,"
submitted, International Conference on ComputerAided Design (ICCAD), Nov. 2012, San Jose, CA.
E. Kultursay, K. Swaminathan, V. Saripalli, S. datta, V. Narayanan, and M. Kandemir,
"Performance enhancement under power constraints using heterogeneous CMOSTFET multicores,"
IEEE/ACM International Conference on Hardware/Software Codesign and System Synthesis, Oct. 2012, Tampere, Finland.
R. Mukundrajan, M. Cotter, V. Saripalli, M. J. Irwin, S. Datta, and V. Narayanan,
"Ultra low power circuit design using tunnel FETs,"
IEEE Computer Society Annual Symposium on VLSI, August 2012, Amherst, MA.
D. K. Mohata, R. Bijesh, Y. Zhu, M. K. Hudait, R. Southwick, Z. Chbili, D. Gundlach, J. Suehle, J. M. Fastenau, D. Loubychev, A. K. Liu, T. S. Mayer, V. Narayanan and S. Datta,
"Demonstration of improved heteroepitaxy, scaled gate stack and reduced interface states enabling heterojunction tunnel FETs with high drive current and high onoff ratio,"
Symposium on VLSI Technology, pp. 5354, June, 2012, Honolulu, HI.
H. Liu, D. K. Mohata, N. Agrawal, V. Saripalli, V. Narayanan and S. Datta
"Exploration of vertical MOSFET and tunnel FET device architecture for sub 10nm node applications," ,
Device Research Conf., June 2012, University Park, MD.
R. Bijesh, D. K. Mohata, H. Liu, and S. Datta,
"Flicker noise characterization and modeling of homo and heterojunction IIIV tunnnel FETs,"
Device Research Conference, June 2012, University Park, MD.
2011
D. K. Mohata, R. Bijesh, S. Mujumdar, C. Eaton, R. EngelHerbert, T. Mayer, V. Narayanan, J. Fastenau, D. Loubychev, A. Liu, and S. Datta
"Demonstration of MOSFETlike oncurrent performance in arsenide/antimonide tunnel FETs with staggered heterojunctions for 300mV logic applications,"
IEEE International Electron Devices Meeting, Dec. 2011, Washington DC.
V. Saripalli, S. Datta, V. Narayanan, Y. Xie, et al,
"Exploiting heterogeneity for energy efficiency in chip multiprocessors,"
IEEE J. Emerging and Selected Topics in Circuits and Systems, 1, 2 pp. 109119, 2011.
D. K. Mohata, S. Mookerjea, A. Agrawal, Y. Li, T. Mayer, V. Narayanan, A. Liu, and S. Datta,
"Experimental staggered source and N+ pocket (δ)doped channel IIIV tunnel FETs and their scalabilities,"
Applied Physics Express, vol. 4, pp. 024105, 2011.
E. Kultursay, S. Datta, and V. Narayanan,
"Improving energy efficiency of multithreaded applications using heterogeneous CMOSTFET CMP architectures,"
ISLPED 2011, Aug. 2011, Fukuoka, Japan.
V. Saripalli, A. Misra, S. Datta, and V. Narayanan,
"An energyefficient heterogeneous CMP based on hybrid TFETCMOS cores,"
Design Automation Conference (DAC), June 2011, San Diego, CA.
Y. C. Chen, S. Soumya, G. Sun, Y. Xie, S. Datta, and V. Narayanan,
"Automated mapping for reconfigurable single electron transistor arrays,"
Design Automation Conference (DAC), June 2011, San Diego, CA.
D. Mohata, R. Bijesh, V. Saripalli, T. Mayer, and S. Datta,
"Selfaligned gate nanopillar In0.53Ga0.47As vertical tunnel transistor,"
Device Research Conf., June 2011, Santa Barbara, CA.
V. Saripalli, S. Datta, J. Kulkarni (Intel), and V. Narayanan,
"Variationtolerant ultra lowpower heterojunction tunnel FET SRAM design,"
NANOARCH 2011, June 2011, San Diego, CA.
2010
A. Ali, H. S. Madan, A. P. Kirk, R. M. Wallace, D. A. Zhao, D. A. Mourey, M. K. Hudait, T. N. Jackson, B. R. Bennett, J. B. Boos, and S. Datta,
"Fermi level unpinning of GaSb (100) using plasma enhanced atomic layer deposition of Al_{2}O_{3} dielectric,"
Appl. Phys. Lett. 97,143502, 2010.
W. C. Kao, A. Ali, E. Hwang, S. Mookerjea, and S. Datta,
"Effect of interface states on subthreshold response of IIIV MOSFETs, MOS HEMTs and tunnel FETs,"
SolidState Electronics, 54 (12), p. 1665, 2010.
V. Saripalli, L. Liu, S. Datta, and V. Narayanan,
"Energydelay performance of nanoscale transistors exhibiting single electron behavior and associated logic circuits,"
J. of Low Power Electronics, vol. 6, no. 3, pp. Oct. 2010.
S. Datta, A. Ali, S. Mookerjea, V. Saripalli, L. Liu, S. Eachempati, T. Mayer, and V. Narayanan,
"Nonsilicon logic elements on silicon for extreme voltage scaling,"
invited, Proc. of the Silicon Nanoelectronics Workshop (SNW), pp.1516, June 2010, Honolulu, Hawaii.
S. Datta,
"Compound semiconductor based tunnel transistor logic,"
invited, Lester Eastman Conference on High Performance Devices (LEC 2010), pp.178179, Troy, NY, Aug. 2010.
A. Ali , H. Madan, S. Koveshnikov, S. Oktyabrsky, R. Kambhampati, T. Heeg, D. Schlom, and S. Datta,
"Small signal response of inversion layers in high mobility In_{0.53}Ga_{0.47}As MOSFETs made with thin highk dielectrics,"
IEEE Trans. on Electron Devices, 57, 4, pp. 742748, 2010.
S. Mookerjea, D. Mohata, T. Mayer, V. Narayanan, and S. Datta,
"Temperature dependent IV characteristics of a vertical In_{0.53}Ga_{0.47}As tunnel FET (TFET),"
IEEE Electron Device Lett., 31, 6, 2010.
V. Saripalli, S. Datta, and N. Vijaykrishnan,
"Analyzing energydelay behavior in room temperature single electron transistors,"
International Conference on VLSI Design, Jan. 2010, Bangalore, India.
L. Liu and S. Datta,
"Investigation of the scalability of ultra thin body double gate tunnel FET using physics based 2D analytical model,"
Device Research Conference, June 2010, Notre Dame, IN.
D. K. Mohata, D. Pawlik, L. Liu, S. Mookerjea, V. Saripalli, S. Rommel, and S. Datta,
"Implications of record peak current density In_{0.53}Ga_{0.47}As Esaki tunnel diode on tunnel FET logic applications,"
Device Research Conf., June 2010, Notre Dame, IN.
V. Saripalli, D. K. Mohata, S. Mookerjea, S. Datta, and V. Narayanan,
"Low power loadless 4T SRAM cell based on degenerately doped source (DDS) In_{0.53}Ga_{0.47}As tunnel FETs,"
Device Research Conf., June 2010, Notre Dame, IN.
D. Pawlik, S. Kurinec, S. Mookerjea, D. Mohata, S. Datta, S. Cohen, D. Ritter, and S. Rommel,
"Submicron InGaAs Esaki diodes with record high peak current density,"
Device Research Conf., June 2010, Notre Dame, IN.
J. Singh, R. Krishnan, S. Mookerjea, S. Datta, and V. Narayanan,
“A novel Si TFET based SRAM design for ultra lowpower 0.3V VDD applications,”
15th Asia Pacific Design Automation Conf., Jan. 2010.
2009
S. Mookerjea, D. Mohata, R. Krishnan, J. Singh, A. Vallet, A. Ali, T. Mayer, V. Narayanan, D. Schlom, A. Liu, and S. Datta,
“Experimental demonstration of 100nm channel length In_{0.53}Ga_{0.47}Asbased vertical interband tunnel field effect transistors (TFETs) for ultra lowpower logic and SRAM applications,”
late news paper, IEEE International Electron Devices Meeting, Dec. 2009.
H. Madan, A. Ali, S. Koveshnikov, and S. Datta,
“Interface state response in HfO_{2} gated strained InAs quantumwell FETs,”
40th IEEE Semiconductor Interface Specialists Conf., Dec. 2009.
W. C. Kao, E. Hwang, S. Mookerjea, and S. Datta,
“Impact of interface states on subthreshold response of IIIV MOSFETs, MOS HEMTs and tunnel FETs,”
40th IEEE Semiconductor Interface Specialists Conf., Dec. 2009.
A. Ali , H. Madan, S. Koveshnikov, S. Oktyabrsky, R. Kambhampati, T. Heeg, D. Schlom and S. Datta,
“Small signal response of inversion layers in high mobility In_{0.53}Ga_{0.47}As MOSFETs made with thin highk dielectrics,”
ECS Trans., vol. 25, no. 6, pp. 271284, “Physics and Technology of Highk Gate Dielectrics,” Oct. 2009.
A. Ali, H. Madan, S. Koveshnikov, and S. Datta,
“Small signal response of inversion layers in high mobility In_{0.53}Ga_{0.47}As MOSFETs made with thin highk dielectrics,”
ECS Trans., Symposium on High Dielectric Constant Materials and Gate Stacks, Oct. 2009, Vienna, Austria.
V. Saripalli, V. Narayanan, and S. Datta,
“Ultra low energy binary decision diagram circuits using few electron transistors,”
Workshop on NanoBio Sensing Paradigms and Applications (in conjunction with NanoNet 2009), Oct. 2009, Luzern, Switzerland.
S. Mookerjea, R. Krishnan, S. Datta, and V. Narayanan,
“On enhanced Miller capacitance effect in interband tunnel transistors,”
IEEE Electron Device Lett., 30, 10, 11021104, Oct. 2009.
S. Mookerjea, R. Krishnan, S. Datta, and V. Narayanan,
“Effective capacitance and drive current for tunnelFET (TFET) CV/I estimation,”
IEEE Trans. Electron Devices, 56, 9, 20922098, Sept. 2009.
S. Mookerjea and S. Datta,
“Bandgap engineered hot carrier tunnel transistors,”
67th Device Research Conf. Digest, 121122, June 2009, University Park, PA.
A. Ali, S. Mookerjea, E. Hwang, S. Koveshnikov, S. Oktyabrsky, V. Tokranov, M. Yakimov, R. Kambhampati, W. Tsai, and S. Datta,
“HfO_{2} gated, self aligned and directly contacted indium arsenide quantumwell transistors for logic applications: A temperature and bias dependent study,”
67th Device Research Conf. Digest, pp. 5556, June 2009.
S. Mookerjea, R. Krishnan, A. Vallett, T. Mayer, and S. Datta,
"Interband tunnel transistor architecture using narrow gap semiconductors,"
ECS Trans., vol. 19, issue 5, pp. 287292, "Graphene and Emerging Materials for PostCMOS Applications", May 2009.
2008
V. Saripalli, S. Mookerjea, S. Datta, and V. Narayanan,
“Ultra low power signal processing architectures,”
Proc. IEEE Biomedical Circuits and Systems Conf., Nov. 2008, Baltimore, MD.
S. Eachempati, V. Saripalli, N. Vijaykrishan, and S. Datta,
“Reconfigurable BDD based quantum circuits,”
IEEE/ACM Int. Symp. on Nanoscale Architectures, June 2008, Anaheim, CA.
S. Mookerjea and S. Datta,
“Comparative study of Si, Ge, and InAs based steep subthreshold slope tunnel transistors for 0.25 V supply voltage logic applications,”
Device Research Conf., June 2008, Santa Barbara, CA.
Project: Nanofabrication platform for onedimensional nanowire tunnel transistors
Principal investigators: Theresa Mayer, Suman Datta  Penn State
2012
T. Mayer, S. Levin, Li, S. Datta, T. Morrow, Li, Kim, C. D. Keating,
"Adding new functionality to Si CMOS via deterministic assembly,"
ECS Prime, Honolulu, HI, Oct. 2012.
M.W. Kuo, J. Li, H. Liu, A. Vallett, D. K. Mohata, S. Datta, and R. S. Mayer,
"Deterministic assembly of In_{0.53}Ga_{0.47}As p+in+ nanowire junction for tunnel transistors,"
invited, ECS Transactions, 45 (4) 129136 (2012).
S. Levin, J. Kuang, J. Cox, J. S. Mayer, and T. S. Mayer,
"Heterogeneous integration of ultrathin sheets of alternative materials onto silicon substrates,"
invited, ECS Transactions, 45 (3) 559565 (2012).
M.W. Kuo, C. Kendrick, J. Redwing, and T. S. Mayer,
"Intentional doping study of trimethylborondoped silicon nanowires via vapor liquid solid growth with silicon tetrachloride"
Electronic Materials Conference, June 2012, State College, PA.
2011
B. D. Smith, T. S. Mayer, and C. D. Keating,
"Deterministic assembly of functional nanostructures using electric fields,"
Annual Reviews of Physical Chemistry, in press.
T. S. Mayer, J. S. Mayer, and C. D. Keating,
"Electricfield Assisted Deterministic Assembly,"
Encyclopedia for Nanotechnology, in press.
2010
A. L. Vallett, S. Minassian, S. Datta, J. M. Redwing, and T. S. Mayer,
"Fabrication of axially doped silicon nanowire tunnel FETs and characterization of tunneling current,"
Device Research Conf., June 2010, Notre Dame, IN.
A. L. Vallett, S. Minassian, H. Liu, S. Datta, J. M. Redwing, and T. S. Mayer,
"Fabrication and characterization of axially doped silicon nanowire pn junctions,"
Materials Research Society Spring Meeting, April 2010, San Francisco, CA.
A. L. Vallett, S. Minassian, P. Kaszuba, S. Datta, J. M. Redwing, and T. S. Mayer,
"Fabrication and characterization of axially doped silicon nanowire tunnel FETs,"
Nano Lett., 2010, 10 (12), pp. 48134818.
2009
T. J. Morrow, M. Li, J. Kim, T. S. Mayer, and C. D. Keating,
"Programmed assembly of DNAcoated nanowire devices,"
Science, 323, 352, 2009.
2008
T.T. Ho, Y. Wang, S. Eichfeld, K.K. Lew, B. Liu, S. Mohney, J. Redwing, and T. Mayer,
“In situ axiallydoped nchannel silicon nanowire field effect transistors,”
Nano Letters, 8(12), pp. 43594364, 2008.
A. Vallet, S. Eichfeld, J. Redwing, T. Mayer, A. Deering, R. Wells, and P. Kaszuba,
“Junction delineation of insitu doped silicon nanowires by scanning Kelvin probe microscopy,”
Fall Materials Research Society Meeting, Dec. 2008, Boston, MA.
Project: Characterization of tunnel fieldeffect transistor (TFET) interfaces (new project in 2011)
Principal investigators: Robert Wallace, Jiyoung Kim  University of Texas at Dallas
2013
D. M. Zhernokletov, H. Dong, B. Brennan, M. Yakomov, V. Tokranov, S. Oktyabrsky, J. Kim, and R. M. Wallace,
"Surface and interfacial reaction study of half cycle atomic layer deposited Hf0_{2} on chemically treated GaSb surfaces,"
submitted, Appl. Phys. Lett., 2013.
D. M. Zhernokletov, P. Laukkanen, H. Dong, R. V. Galatage, B. Brennan, M. Yakomov, V. Tokranov, J. Kim, S. Oktyabrsky, and R. M. Wallace,
"Surface and interfacial reaction study of InAs(100)crystalline oxide interface,"
submitted, Appl. Phys. Lett., 2013.
2012
D. M. Zhernokletov, H. Dong, B. Brennan, J. Kim, and R. M. Wallace,
"Optimization of the ammonium sulfide (NH4)2S passivation process on InSb(111)A,"
J. Vacuum Science Technology B, 30, 4, 2012.
B. Brennan, D. M. Zhernokletov, H. Dong, C. L. Hinkle, J. Kim, and R. M. Wallace,
"Insitu surface pretreatment study of GaAs and In_{0.53}Ga_{0.47}As,"
Appl. Phys. Lett., 100, 15603 (2012).
B. Chakrabarti, H. Kang, B. Brennan, T. J. Park, K. D. Cantley, A. Pirkle, J. Kim, R. M. Wallace, and E. M. Vogel,
"Investigation of tunneling current in SiO_{2}/HfO_{2} gate stacks for flash memory applications,"
IEEE Trans. on Electron Dev., 58, 12, 2011.
S. McDonnell, H. Dong, J. M. Hawkins, B. Brennan M. Milojevic, F. A. AguirreTostado, D. M. Zhernokletov, C. L. Hinkle, J. Kim, and R. M. Wallace,
"Interfacial oxide regrowth in thin film metal oxide IIIV semiconductor systems,"
Appl. Phys. Lett., 100, 141606 (2012)
D. Zhernokletov, H. Dong, B. Brennan, S. McDonnell, J. Kim, and R. M. Wallace,
"Halfcycle atomic layer deposition studies of Al_{2}O_{3}/HfO_{2} on the GaSb(001) surface,"
TECHCON, Sept. 2012, Austin, TX.
D. Zhernokletov, H. Dong, B. Brennan, J. Kim, and R. M. Wallace,
"Chemical and electrical properties of the crystalline oxide/In_{0.53}Ga_{0.47}As (100) interface,"
poster, 72nd Annual PEC Conference, June 2012, Richardson, TX.
B. Brennan, D. M. Zhernokletov, H. Dong, G. Hughes, and R. M. Wallace,
"Growth and evolution of the native oxide on the atomically clean and (NH4)2Streated In_{0.53}Ga_{0.47}As surface,"
72nd Annual PEC Conference, June 2012, Richardson, TX.
D. Zhernokletov, H. Dong, B. Brennan, M. Yakomov, V. Tokranov, J. Kim, S. Oktyabrsky, and R. M. Wallace,
"An investigation of arsenic and antimony capping layers, and half cycle reactions during atomic layer deposition of Al_{2}O_{3} on GaSb(100),"
Materials Research Society Spring Meeting, April 2012, San Francisco, CA.
S. McDonnell, H. Dong, J. M. Hawkins, B. Brennan, M. Milojevic, F. S. AguirreTostado, D. M. Zhernokletov, C. L. Hinkle, J. Kim, and R. M. Wallace,
"Insitu vs. exsitu characterization of highk/IIIV interfaces using xray photoelectron spectroscopy,"
poster, PSCI 39th International Symposium, Jan. 2012, Santa Fe, NM.
2011
B. Brennan, H. Dong, D. Zhernokletov, J. Kim, and R. M. Wallace,
"Surface and interface reaction study of half cycle atomic layer deposited Al_{2}O_{3} on chemically treated InP surfaces,"
Appl. Phys. Exp., 4, 125701, 2011.
D. Zhernokletov, H. Dong, B. Brennan, J. Kim, and R. M. Wallace,
"Halfcycle atomic layer deposition studies of HfO_{2} on the GaSb(001) surface,"
AVS 58th International Symposium, Oct. 2011, Nashville, TN
A. Seabaugh, S. D. Chae, P. Fay, W. S. Hwang, T. Kosel, R. Li, Q. Liu, Y. Lu, T. Vasen, M. Wistey, H. Xing, Q. Zhang, G. Zhou, and R. Wallace,
"Interface traps and low subthreshold swing in IIIV tunnel FETs,"
invited, AVS Symposium, Oct. 2011, Nashville, TN.
M. Milojevic, R. ContrerasGuerrero, E. O'Connor, B. Brennan, P. K. Hurley, J. Kim, C. L. Hinkle, and R. M. Wallace,
"Insitu characterization of Ga_{2}O passivatin of In_{0.53}Ga_{0.47}As prior to highk dielectric atomic layer deposition,"
Appl. Phys. Lett., 99, 042904, 2011.
S. McDonnell, D. M. Zhernokletov, A. P. Kirk, J. Kim, and R. M. Wallace,
"In situ xray photoelectron spectroscopy characterization of Al_{2}O_{3}/GaSb interface evolution,"
Applied Surface Science, 257, pp. 87478751, 2011.
Project: Graphene nanoribbon tunnel fieldeffect transistors (GNR TFETs)
Principal investigators: Debdeep Jena, Grace Xing  Notre Dame
2013
P. Zhao, R. M. Feenstra, G. Gu, and D. Jena,
"SymFET: A proposed symmetric graphene tunneling fieldeffect transistor,"
accepted, IEEE Trans. on Electron Dev., 2013.
2012
K. Xu, C. Zeng, Q. Zhang, R. Yan, P. Ye, K. Wang, A. Seabaugh, H. G. Xing, J. S. Suehle, C. A. Richter, D. J. Dunglach, and N. V. Nguyen,
"Direct measurement of Dirac point of graphene by cavity enhanced internal photoemission,"
Nano Lett. (2012) online.
R. Yan, Q. Zhang, O. A. Kirillov, W. Li, J. Basham, A. Boosalis, X. Liang, D. Jena, C. Richter, A. Seabaugh, D. Gundlach, H. G. Xing, and N. Nguyen,
"Graphene as transparent electrode for direct observation of hole photoemission from silicon to oxide,"
submitted, Nano Lett. (2012).
R. Yan, S. Bertolazzi, Jacopo Brivio, T. Fang, A. Konar, A. G. Birdwell, N. V. Nguyen, A. Kis, D. Jena, H. G. Xing,
"Raman and photoluminescence study of dielectric and thermal effects on atomically thin MoS2."
submitted, Appl. Phys. Lett. (2012).
W. S. Hwang, M. Remskar, R. Yan, T. Kosel, J. K. Park, B. J. Cho, W. Haensch, H. G. Xing, A. Seabaugh, and D. Jena,
"Comparative study of chemically synthesized and exfoliated multilayer MoS2 field effect transistors,"
submitted, Appl. Phys. Lett., 2012.
W. S. Hwang, K. Tahy, P. Zhao, S. D. Chae, L. O. Nyakiti, V. D. Wheeler, R. L. MyersWard, C. R. Eddy Jr., D. Kurt Gaskill, H. Xing, A. Seabaugh, and D. Jena,
"Topgated epigraphene nanoribbon fieldeffect transistors with 10 A/mm current density,"
submitted, Electron Device Lett.
R. M. Feenstra, D. Jena, G. Gu,
"Singleparticle tunneling in doped grapheneinsulatorgraphene junctions,"
J. Appl. Phys. 111, 043711 (2012).
W. S. Hwang, K. Tahy, X. Li, H. G. Xing, A. C. Seabaugh, C. Y. Sung, and D. Jena,
"Transport properties of graphene nanoribbon transistors on chemicalvapordeposition grown waferscale graphene,"
Appl. Phys. Lett., 100, 203107 (2012).
W. S. Hwang, M. Remskar, R. Yan, V. Protasenko, K. Tahy, S. D. Chae, P. Zhao, A. Konar, H. Xing, A. Seabaugh, and D. Jena,
"Transistors with chemically synthesized layered semiconductor WS2 exhibiting 10(5) room temperature modulation and ambipolar behavior,"
Appl. Phys. Lett., 101, 013107, 2012.
K. Tahy, H. Xing, and D. Jena,
"Graphene nanoribbon FETs for digital electronics: Experiment and modeling,"
IJCTA Nanoelectronic Circuits Special Issue, 2012.
B. SensaleRodriguez R. Yan, M. Kelly, T. Fang K. Tahy, W. S. Hwang, D. Jena, L. Liu, and H. Xing,
"Broadband graphene terahertz modulators enabled by intraband transitions,"
Nature Communications 3, 780, 2012.
R. Yan, Q. Zhang, W. Li, I. Calizo, T. Shen, C. A. Richter, A. R. HightWalker, X. Liang, A. Seabaugh, D. Jena, H. Xing, D. J. Gundlach, and N. V. Nguyen,
"Determination of graphene work function and grapheneinsulatorsemiconductor band alignment by internal photoemission spectroscopy,"
Appl. Phys. Lett., 101, 022105, 2012.
R. Yan, Q. Zhang, O. A. Kirillov, W. Li, J. Basham, X. Liang, D. Jena, C. A. Richter, A. Seabaugh, D. J. Dunglach, H. Xing, and N. V. Nguyen,
"Graphene as an electrode for directly observing hold injection from silicon to oxide,"
Semiconductor Interface Specialists Conference (SICS), Dec. 2012, San Diego, CA.
B. SensaleRodriguez, Y. Lu, L. Barboni, F. Silveira, P. Fay D. Jena, A. Seabaugh, and H. Xing,
"Perspectives of TFETs for low power analog ICs,"
IEEE Subthreshold Microelectronics Conference, Oct. 2012, Waltham, MA.
R. Yan, Q. Zhang, W. Li, I. Calizo, T. Shen, C. Richter, A. HightWalker, X. Liang, A. Seabaugh, H. Xing, D. Gundlach, and N. Nguyen,
"Investigation of grapheneoxidesemiconductor band alignment by internal photoemission spectroscopy,"
International Symposium on Compound Semiconductors (ISCS), August 2012, Santa Barbara, CA.
W. S. Hwang, K. Tahy, P. Zhao, S. D. Chae, L. O. Nyakiti, V. D. Wheeler, R. L. MyersWard, C. R. Eddy Jr., D. Kurt, Gaskill, H. Xing, A. Seabaugh, and D. Jena,
"Topgated epigraphene nanoribbon fieldeffect transistors with output current of 10 mA/um,"
International Symposium on Compound Semiconductors (ISCS), August 2012, Santa Barbara, CA.
W. S. Hwang, P. Zhao, K. Tahy, X. Li, C.Y. Sung, H. Xing, A. Seabaugh, and D. Jena,
"Ultrathin graphene nanoribbon transistors on waferscale chemicalvapordeposited graphene,"
poster, International Symposium on Compound Semiconductors, August 2012, Santa Barbara, CA.
W. S. Hwang, P. Zhao, K. Tahy, J. Verma, L. O. Nyakiti, V. D. Wheeler, R. L. MyersWard, C. R. Eddy Jr., D. K. Gaskill, J. A. Robinson, H. Xing, A. Seabaugh, and D. Jena,
"Transport properties of graphene nanoribbon FETs on wafersize epitaxial graphene on SiC,"
poster, International Conference on the Physics of Semiconductors (ICPS), Late News, July 2012, Zurich, Switzerland.
P. Zhao, G. Gu, R. Feenstra, and D. Jena,
"SymFET: A proposed graphene tunneling transistor,"
Device Research Conference, June 2012, University Park, PA.
W. S. Hwang, M. Remskar, R. Yan, V. Protasenko, K. Tahy, S. D. Chae, H. Xing, A. Seabaugh, and D. Jena,
"First demonstration of twodimensional WS2 transistors exhibiting 105 room temperature modulation and embipolar behavior,"
Device Research Conference, June 2012, University Park, PA.
D. Jena, W. S. Hwang, K. Tahy, P. Zhao, R. MyersWard, P. Campbell, C. Eddy, Jr., D. Gaskill, H. Xing, and A. Seabaugh,
"Waferscale graphene nanoribbon transistor technology,"
221st ECS Meeting, Seattle Washington, May 2012.
W. S. Hwang, K. Tahy, P. Zhao, R. L. MyersWard, P. M. Campbell, C. R. Eddy, Jr., D. K. Gaskill, H. Xing, A. C. Seabaugh, and D. Jena,
"Waferscale graphene nanoribbons for tunnel FET applications,"
19th Korean Conference on Semiconductors, Feb. 2012, Seoul, Korea.
2011
W. S. Hwang, K. Tahy, R. L. MyersWard, P. M. Campbell, C. R. Eddy Jr., D. K. Gaskill, H. Xing, A. C. Seabaugh, and D. Jena,
"Fabrication of topgated epitaxial graphene nanoribbon FETs using hydrogen silsesquioxane (HSQ),"
J. Vac. Sci. and Technol. B, 30(3) 2012.
B. SensaleRodriguez, T. Fang, R. Yan, M. Kelly, D. Jena, L. Liu, and H. Xing,
"Unique prospects for graphenebased terahertz modulators,"
Appl. Phys. Lett. 99, 113104 (2011).
A. Liao, J. Wu, X. Wang, K. Tahy, D. Jena, H. Dai, and E. Pop,
"Thermallylimited current carrying ability of graphene nanoribbons,"
TECHCON, Sept. 2011, Austin, TX.
K. Tahy, W. S. Hwang, J. L. Tedesco, R. L. MyersWard, P. M. Campbell, C. R. Eddy Jr., D.K. Gaskill, H. Xing, A. C. Seabaugh,
and D. Jena,
"Large scale fabrication of sub10 nm graphene nanoribbon field effect transistors,"
TECHCON, Sept. 2011, Austin, TX.
B. Gao, G. Hartland, T. Fang, M. Kelly, D. Jena, H. Xing, and L. Huang,
"Studies of intrinsic hot phonon dynamics in suspended graphene by transient absorption microscopy,"
Nano Lett., 2011, 11 (8), pp 3184–3189.
P. Zhao, Q. Zhang, D. Jena, and S. Koswatta,
"Influence of metalgraphene contacts on the operation and scalability of graphene fieldeffect transistors,"
IEEE Trans. Electron Dev., 58, 9, pp. 31703178, 2011.
L. Huang, B. Gao, G. Hartland, M. Kelly, H. Xing,
"Ultrafast relaxation of hot optical phonons in monolayer and multilayer graphene on different substrates,"
Surface Science, 605, 1718, pp. 16571661, 2011.
W. S. Hwang, K. Tahy, J. L. Tedesco, R. L. MyersWard, P. M. Campbell, C. R. Eddy Jr., D. K. Gaskill, H. Xing, A. C. Seabaugh,
and D. Jena,
"Fabrication of topgated sub10 nm epitaxial graphene nanoribbon FETs using hydrogen silsesquioxane (HSQ),"
Electronic Materials Conf., June 2011, Santa Barbara, CA.
K. Tahy, W. S. Hwang, J. L. Tedesco, R. L. MyersWard, P. M. Campbell, C. R. Eddy Jr., D. K. Gaskill, H. Xing, A. C. Seabaugh, and D. Jena,
"Sub10 nm epitaxial graphene nanoribbon FETs,"
IEEE Device Research Conf., Tech. Digest, June 2011.
P. Zhao, D. Jena, and S. Koswatta,
"RF performance projections for 2D graphene transistors: Role of parasitics at the ballistic transport limit,"
IEEE Device Research Conf., Tech. Digest, June 2011.
K. Tahy, W. S. Hwang, J. L. Tedesco, R. L. MyersWard, P. M. Campbell, C. R. Eddy Jr., D. K. Gaskill, H. Xing, A. C. Seabaugh,
and D. Jena,
"Control of the unintentional doping in epitaxial graphene FETs,"
Graphene 2011, April 2011, Bilbao, Spain.
D. Jena, K. Tahy, T. Fang, P. Zhao, W. S. Hwang, M. Kelly, S. Koswatta, K. Gaskill, R. L. MyersWard, J. Tedesco, C. Eddy, R. Li, H. Xing, and A. Seabaugh,
"Graphene transistors for digital applications"
The Government Microcircuit Applications and Critical Technology Conference (GOMACTech), March 2011, Orlando, FL.
2010
A. Konar, T. Fang, and D. Jena,
"Effect of highk gate dielectrics on charge transport in graphenebased field effect transistors,"
Phys. Rev. B., 82, 115452 (2010).
L. Huang, G. Hartland, L.Q. Chu, Luxmi, R. Feenstra, C. Lian, K. Tahy, and H. Xing,
"Ultrafast transient absorption microscopy studies of carrier dynamics in epitaxial graphene,"
Nano Lett., 10, 1308, 2010.
C. Lian, K. Tahy, T. Fang, G. Li, H. Xing, and D. Jena,
"Quantum transport in graphene nanoribbons patterned by metal masks,"
Appl. Phys. Lett., 96, 103109, 2010.
K. Tahy, M. J. Fleming, B. Raynal, V. Protasenko, S. Koswatta, D. Jena, H. Xing, and M. Kelly,
"Device characteristics of singlelayer graphene FETs grown on copper,"
Device Research Conf., June 2010, Notre Dame, IN.
N. Sun, K. Tahy, J. L. Tedesco, R. L. MyersWard, P. M. Campbell, C. R. Eddy Jr., D. K. Gaskill, H. Xing, D. Jena, and S. T. Ruggiero,
"Electrical noise in exfoliated and epitaxial graphene,"
Electronic Materials Conf., June 2010, Notre Dame, IN.
K. Tahy, H. Xing, and D. Jena,
"Graphene nanoribbon pn junction FETs: Experimental results and modeling,"
IEEE Les Eastman Conf., Aug. 2010, Troy, NY.
T. Fang, A.Konar, H. Xing, and D. Jena,
"Carrier transport in 2D graphene pn junctions,"
Electronic Materials Conf., June 2010, Notre Dame, IN.
M. Kelly, K. Tahy, M.J. Fleming, B. Raynal, V. Protasenko, D. Jena, and H. Xing,
"Fabrication and characterization of graphene materials via CVD on copper based substrates,"
Electronic Materials Conf., June 2010, Notre Dame, IN.
2009
D. Jena, K. Tahy, A. Konar, T. Fang, Q. Zhang, S. Koswatta, H. Xing, and A. Seabaugh,
“Graphene electronics,”
8th Topical Workshop on Heterostructure Microelectronics (TWHM),
Aug. 2009, Nagano, Japan.
D. Jena, K. Tahy, A. Konar, T. Fang, Q. Zhang, S. Koswatta, H. Xing, and A. Seabaugh,
“Graphene based transistors,”
18th European Workshop on Heterostructure Technology (HETECH), Nov. 2009, Ulm, Germany.
C. Lian, K. Tahy, T. Fang, G. Li, H. Xing, and D. Jena,
“Quantum transport in patterned graphene nanoribbons,”
International Semiconductor Device Research Symposium (ISDRS), Dec. 2009, Baltimore, MD.
K. Tahy, C. Lian, H. Xing, and D. Jena,
“Operation regimes of doublegated graphene nanoribbon FETs,”
International Semiconductor Device Research Symposium (ISDRS), Dec. 2009, Baltimore, MD.
D. Jena,
“A theory for the highfield currentcarrying capacity of 1D semiconductors,”
J. Appl. Phys., 105, 123701, 2009.
K. Tahy, D. Shilling, T. Zimmermann, H. Xing, P. Fay, Luxmi, R. Feenstra, and D. Jena,
“Gigahertz operation of epitaxial graphene transistors,”
Device Research Conf., June 2009, University Park, PA.
K. Tahy, S. Koswatta, T. Fang, Q. Zhang, H. Xing, and D. Jena,
“Highfield transport properties of 2D and nanoribbon graphene FETs,”
Device Research Conf., June 2009, University Park, PA.
2008
Q. Zhang, T. Fang, H. Xing, A. Seabaugh, and D. Jena,
“Graphene nanoribbon tunnel transistors,”
IEEE Electron Device Lett., 29, 13441346, 2008.
T. Fang, A. Konar, H. Xing, and D. Jena,
“Mobility in semiconducting graphene nanoribbons: Phonon, impurity, and edge roughness scattering,”
Phys. Rev. B, 78, 205403, 2008.
X. Luo, Y. Lee, A. Konar, T. Fang, G. Xing, G. Snider, and D. Jena,
“Currentcarrying capacity of long and short channel 2D graphene transistors,”
Device Research Conf., June 2008, Santa Barbara, CA.
D. Jena, T. Fang, Q. Zhang, and G. Xing,
“Zener tunneling in semiconducting nanotube and graphene nanoribbon pn junctions,”
Appl. Phys. Lett., 93, 112106, 2008.
T. Fang, A. Konar, G. Xing, and D. Jena,
“Carrier statistics and quantum capacitance of graphene sheets and ribbons,”
Appl. Phys. Lett., 91, 092109, 2007.
Project: Applications and architectures for nanomagnet logic (NML)
Principal investigators: György Csaba, X. Sharon Hu, Peter Kogge, Michael Niemier, Wolfgang Porod  Notre Dame
2012
J. Kiermaier, S. Breitkreutz, I. Eichwald, J. Engelstädter, X. Ju, G. Csaba, D. SchmittLandsiedel, and M. Becherer,
"Information transport in fieldcoupled nanomagnetic logic devices,"
submitted, 12th joint Intermag/MMM, January 2013, Chicago, IL.
I. Eichwald, J. Wu, J. Kiermaier, S. Breitzkreutz, G. Csaba, D. SchmittLandsiedel, and M. Becherer,
"Towards a signal crossing in 2level nanomagnetic logic,"
submitted, 12th joint Intermag/MMM, January 2013, Chicago, IL.
X. Ju, M. Niemier, M. Becherer, W. Porod, P. Lugli, and G. Csaba,
"Systolic pattern matching hardware with outofplane nanomagnet logic devices,"
accepted, IEEE Transactions on Nanotechnology.
I. Palit, X. S. Hu, J. Nahas, and M. Niemier,
"Systematic design of nanomagnet logic circuits,"
accepted, Design Automation and Test Europe, 2013.
M. Crocker, M. T. Niemier, and X. S. Hu,
“A reconfigurable PLA architecture for nanomagnet logic,”
ACM J. on Emerging Technologies in Computing Systems, 8, 1, 2012.
M. Niemier, G. Csaba, A. Dingler, X. S. Hu, W. Porod, X. Ju, M. Becherer, D. SchittLandsiedel, P Lugli,
"Boolean and nonBoolean architectures for outofplane nanomagnet logic,"
International Workshop on Cellular Nanoscale Networks and their Applications, August 2012, Turino, Italy.
M. Niemier, X. Ju, M. Becherer, G. Csaba, X. S. Hu, D. schmittLandsiedel, P. Lugli, and W. Porod,
"Systolic architectures and applications for nanomagnet logic,"
Silicon Nanoelectronics Workshop, June 2012, Honolulu, HI
2011
M. Ottavi, et al, P. Kogge,
"Partially reversible pipelined QCA circuits: Combining low power with high throughput,"
IEEE Trans. Nanotechnology., 10, 6, pp. 13831393, 2011.
E. Varga, G. Csaba, G. H. Bernstein, and W. Porod,
"Implementation of a nanomagnetic full adder circuit,"
IEEE NANO, Aug. 2011, Portland, OR.
2010
A. Dingler, M. T. Niemier, X. S. Hu, and E. Lent,
"Performance and energy impact on locally controlled NML circuits,"
ACM Journal on Emerging Technologies in Computing Systems, 7(1), p. 124, 2010.
M. Crocker, X. S. Hu, and M. Niemier,
"Design and comparison of NML systolic architectures,"
Proc. of IEEE/ACM International Symposium on Nanoscale Architectures, p. 2934, June 2010, Anaheim, CA.
2009
M. Crocker, X. S. Hu, and M. T. Niemier,
“Defects and faults in QCAbased PLAs,”
ACM Journal of Emerging Technology and Computing Systems, Vol. 5, No. 2, p. 127, 2009.
A. Dingler, M. Niemier, S. Hu, M. Alam, and M. Garrison,
“Systemlevel energy and performance projections for nanomagnetbased logic,”
Proc. IEEE Symposium on Nanoscale Architectures, p. 2126, July 2009, San Francisco, CA.
2008
M. Crocker, X. Sharon Hu, M. Niemier, M. Yan, and G. Bernstein,
“PLAs in quantumdot cellular automata,”
IEEE Transactions on Nanotechnology, vol. 7, no.3, pp.376386, May 2008.
S. Hu and M. Niemier,
“Computing with nearest neighbor interactions: A nanomagnetic implementation,”
invited, Proc. 6th IEEE/ACM/IFIP Int. Conf. on Hardware/Software Codesign and System Synthesis, Oct. 2008, pp. 223330, Atlanta, GA.
M. Niemier, M. Crocker, and S. Hu,
“Fabrication variations and defect tolerance for nanomagnetbased QCA,”
23rd IEEE Int. Symp. on Defect and Fault Tolerance in VLSI Systems, p. 534542, Oct. 2008, Cambridge, MA.
M. Niemier, A. Dingler, S. Hu, M. Alam, G. Bernstein, and W. Porod,
“Bridging the gap between nanomagnetic devices and circuits,”
26th IEEE Int. Conf. on Computer Design, Oct. 2008, pp. 506513, Lake Tahoe, CA.
Project: Designs and prototypes of nanomagnet logic (NML) circuits with reduced energy, latency, and area
Principal investigators: Gary Bernstein, György Csaba, Sharon Hu, Joe Nahas, Mike Niemier, Wolfgang Porod  Notre Dame
2013
F. A. Shah, V. K. Sankar, G. Csaba, P. Li, E. Chen, X. S. Hu, M. T. Niemier, W. Porod, and G. H. Bernstein,
"Compensation of orangepeel coupling effect in MTJ free layer via shape engineering for NML applications,"
submitted, TECHCON, 2013
F. A. Shah, G. Csaba, M. T. Niemier, X. S. Hu, W. Porod, and G. H. Bernstein,
"Sub10nm intermagnet spacing for improved defect tolerance in NML,"
submitted, Electronic Materials Conference, 2013.
F. A. Shah, G. Csaba, K. Butler, and G. H. Bernstein,
"Closely spaced nanomagnets by dual ebeam exposure for lowenergy NML,"
12th Joint MMM/Intermag, Jan. 2013, Chicago, IL.
2012
M. A. Siddiq, M. T. Niemier, G. H. Bernstein, W. Porod, and X. S. Hu,
"A nanomagnet logic fieldcoupled electrical input,"
submitted, IEEE Trans. on Nanotechnology.
F. Shah, G. Csaba, K. Butler, and G. Bernstein,
"Closely spaced nanomagnets by dual ebeam exposure for lowenergy NML,"
accepted, J. Appl. Phys., 2012.
S. Breitkreutz, J. Kiermaier, I. Eichwald, X. Ju, G. Csaba, D. SchmittLandsiedel, and M. Becherer,
"Investigations on nanomagnet logic by experimentbased compact modeling,"
accepted, Nanoelectronic Device Applications Handbook eds: Morris / Iniewski
I. Eichwald, A. Bartel, J. Kiermaier, S. Breitkreutz, G. Csaba, D. SchmittLandsiedel, and M. Becherer,
"Nanomagnetic Logic: errorfree, directed signal transmission by an inverter chain,"
accepted, IEEE Trans. on Magnetics
S. Breitkreutz , J. Kiermaier, I. Eichwald, X. Ju, G. Csaba, D. Schmitt Landsiedel, and M. Becherer,
"Majority gate for nanomagnetic logic with perpendicular magnetic anisotropy,"
accepted, IEEE Trans. on Magnetics
E. Varga, M. T. Niemier, G. Csaba, G. H. Bernstein, and W. Porod,
"Experimental realization of a nanomagnet full adder using slantededge magnets,"
submitted, IEEE Trans. on Magnetics.
M. A. Siddiq, M. Niemier, G. Csaba, X. S. Hu, W. Porod, and G.H. Bernstein,
"Demonstration of field coupled input scheme on line of nanomagnets,"
submitted, IEEE Trans. on Magnetics.
H. Dey, G. Csaba, X. S. Hu, M. Niemier, G. Bernstein, and W. Porod,
"Switching behavior of sharply pointed nanomagnets for logic applications,"
submitted, IEEE Trans. on Magnetics.
E. Varga, M. T. Niemier, G. Csaba, G. H. Bernstein, and W. Porod,
"Experimental realization of a nanomagnet full adder using slantededge input magnets,"
Joint MMM/Intermag Conference, Chicago, IL, 2013.
M. A. Siddiq, G. H. Bernstein, M. T. Niemier, X. S. Hu, G. Csaba, and W. Porod,
"Demonstration of fieldcoupled input scheme on line of nanomagnets,"
Joint MMM/Intermag Conference, Chicago, IL, 2013.
S. Breitkreutz, J. Kiermaier, I. Eichwald, C. Hildbrand, G. Csaba, D. SchmittLandsiedel, and M. Becherer,
"Experimental demonstration of a 1bit full adder in perpendicular nanomagnetic logic,"
submitted, 12th joint Intermag/MMM, January 2013, Chicago, IL.
S. Kurtz, A. Dingler, M. Niemier, X. S. Hu, J. Nahas, G. H. Bernstein, and W. Porod,
"Preserving steady state nonvolatility in nanomagnet logic circuits,"
TECHCON, Sept. 2012, Austin, TX.
M. Siddiq, G. H. Bernstein, M. Niemier, W. Porod, and X. S. Hu,
"Experimental demonstration of fieldcoupled input scheme for nanomagnet logic (NML),"
TECHCON, September 2012, Austin, TX.
A. Dingler, S. Kurtz, M. Niemier, X. S. Hu, G. Csaba, J. Nahas, W. Porod, G. Bernstein, P. Li, and V. K. Sankar,
"Making nonvolatile nanaomagnet logic nonvolatile,"
Design Automation Conference, June 2012, San Francisco, CA.
M. Niemier, G. Csaba, A. Dingler, X. S. Hu, W. Porod, X. Ju, M. Becherer, D. SchittLandsiedel, P Lugli,
"Boolean and nonBoolean architectures for outofplane nanomagnet logic,"
International Workshop on Cellular Nanoscale Networks and their Applications, August 2012, Turino, Italy.
M. Niemier, X. Ju, M. Becherer, G. Csaba, X. S. Hu, D. schmittLandsiedel, P. Lugli, and W. Porod,
"Systolic architectures and applications for nanomagnet logic,"
Silicon Nanoelectronics Workshop, June 2012, Honolulu, HI
F. A. Shah, V. K. Sankar, and G. H. Bernstein,
"Fabrication of nanomagnet logic elements using HSQ/Ti/PMMA trilayer as an etch mask,"
Intermag, May 2012,
Vancouver
2011
S. Liu, X. S. Hu, J. Nahas, M. Niemier, G. H. Bernstein, and W. Porod,
“Exploring the design of magneticelectrical interface for nanomagnet logic,”
TECHCON, Sept. 2011, Austin, TX.
S. Liu, X. S. Hu, J. J. Nahas, M. Niemier, W. Porod, and G. H. Bernstein,
"Magneticelectrical interface for nanomagnet logic,"
IEEE Trans. on Nanotechnology, 10, 4, pp. 757763, 2011.
S. Kurtz, E. Varga, M. Niemier, W. Porod, G. H. Bernstein, and X. S. Hu,
"Two input, nonmajority magnetic logic gates: Experimental demonstration and future prospects,"
invited, J. of Physics: Condensed Matter, 23(5), p. 053202, 2011.
S. Liu, X. S. Hu, J. Nahas, and M. T. Niemier,
"Design and optimization of magneticelectrical interfaces for NML circuit output,"
Work in Progress session, 2011 Design Automation Conference, June 2011, San Diego, CA.
2010
E. Varga, M. Siddiq, M. T. Niemier, G. H. Bernstein, and W. Porod,
"Experimental investigation of slanted supermalloy nanomagnets and their application in nanomagnet logic,"
TECHCON, Sept. 2010, Austin, Texas.
M. Alam, G. H. Bernstein, J. Bokor, D. Carlton, X. S. Hu, S. Kurtz, B. Lambson, M. T. Niemier, W. Porod, M. Siddiq, and E. Varga,
"Experimental progress of and prospects for nanomagnet logic (NML),"
2010 Symposia on VLSI Technology and Circuits, June 2010, Honolulu, HI.
E. Varga, S. Liu, M. T. Niemier, W. Porod, X. S. Hu, G. H. Bernstein, and A. Orlov,
"Experimental demonstration of fanout for nanomagnet logic,"
Proc. of the Device Research Conference, p. 9596, 2010.
E. Varga, M. T. Niemier, G. H. Bernstein, W. Porod, and X. S. Hu,
"Programmable nanomagnetlogic majority gate,"
Proc. of the Device Research Conference, p. 8586, 2010.
E. Varga, M. Siddiq, M. T. Niemier, M. T. Alam, G. H. Bernstein, W. Porod, X. S. Hu, and A. Orlov,
"Experimental demonstration of nonmajority, nanomagnet logic gates,"
Proc. of the Device Research Conference, p. 8788, 2010.
E. Varga, A. Orlov, M. T. Niemier, X. S. Hu, G. H. Bernstein, and W. Porod,
"Experimental demonstration of fanout for nanomagnet logic,"
IEEE Trans. on Nanotechnology, 9(6), p. 668670, 2010.
2009
A. Dingler, M. J. Siddiq, M. T. Niemier, X. Sharon Hu, M. T. Alam, G. H. Bernstein, and W. Porod,
“Controlling magnet circuits: How clock structure implementation will impact power and correctness,”
IEEE Int. Symposium on Defect and Fault Tolerance in VLSI Systems, p. 94102, Oct. 2009, Chicago, IL.
E. Varga, M. Niemier, G. Bernstein, W. Porod, and S. Hu,
“Nonvolatile and reprogrammable MCQAbased majority gates,”
Proc. Device Research Conf., June 2009, University Park, PA.
2008
M. Niemier, A. Dingler, and S. Hu,
“Design tradeoffs for improved performance in MQCAbased systems,”
1st IEEE Int. Workshop on Design and Test of Nano Devices, Circuits and Systems, Sept. 2008, pp. 3538, Cambridge, MA.
Project: Design and fabrication of energy efficient clocks for nanomagnet logic (NML)
Principal investigators: Gary Bernstein, X. Sharon Hu, Joe Nahas, Michael Niemier, Wolfgang Porod  Notre Dame
2012
E. Varga , G. Csaba, G.H. Bernstein, and W. Porod,
"Domainwall assisted switching of singledomain nanomagnets,"
accepted, IEEE Trans. on Magnetics
P. Li, G. Csaba, V. K. Sankar, X. Ju, E. Varga, P. Lugli, X. S. Hu, M. Niemier, W. Porod, and G. H. Bernstein,
"Direct measurement of magnetic coupling between nanomagnets for nanomagnetic logic applications,"
accepted, IEEE Trans. on Magnetics.
P. Li, V. K. Sankar, G. Csaba, X. S. Hu, M. Niemier, W. Porod, and G. H. Bernstein,
"Magnetic properties of enhanced permeability dielectrics for NML circuits,"
accepted, IEEE Trans. on Magnetics.
P. Li, G. Csaba, V. K. Sankar, X. Ju, E. Varga, P. Lugli, X. P. Li, G. Csaba, M. Niemier, X. S. Hu, J. Nahas, W. Porod, and G. H. Bernstein,
"Power reduction in nanomagnet logic using high permeability dielectrics,"
submitted, J. Appl. Phys.
P. Li, G. Csaba, V. K. Sankar, X. S. Hu, M. Niemier, W. Porod, G. H. Bernstein,
"Paths to clock power reduction via high permeability dielectrics for nanomagnet logic circuits,"
Joint MMM/Intermag Conference, January 2013, Chicago, IL.
M. Siddiq, G. Bernstein, M. Niemier, X. S. Hu, G. Csaba, and W. Porod,
"Field estimation of a NML clock line using switching statistics of different aspect ratio nanomagnets,"
Joint MMM/Intermag Conference, Jan. 2013, Chicago, IL.
P. Li, G. Csaba, V. K. Sankar, X. Ju, X. S. Hu, M. Niemier, W. Porod, and G. H. Bernstein,
"Direct measurement of magnetic coupling between nanomagnets for NML applications,"
TECHCON, September 2012, Austin, TX..
P. Li, G. Csaba, V. K. Sankar, X. S. Hu, M. Niemier, W. Porod, and G. H. Bernstein,
"Power reduction in nanomagnetic logic clocking through high permeability dielectrics,"
Device Research Conference, June 2012, University Park, PA.
P. Li, G. Csaba, V. K. Sankar, X. Ju, X. S. Hu, M. Niemier, W. Porod, and G. H. Bernstein,
"Direct measurement of magnetic coupling between nanomagnets for NML applications,"
IEEE International Magnetics Conference, May 2012 Vancouver, Canada.
P. Li, V. K. Sankar, G. Csaba, F. Shah, X. S. Hu, M. Niemier, W. Porod, and G. H. Bernstein,
"Enhanced permeability dielectrics for power reduction in NML circuits,"
IEEE International Magnetics Conference, May 2012 Vancouver, Canada.
2011
P. Li, G. Csaba, V. K. Sankar, X. Ju, P. Lugli, X. S. Hu, M. Niemier, W. Porod, and G. H. Bernstein,
"Switching behavior of lithographically fabricated nanomagnets for logic applications,"
J. Appl. Phys., 11, 7, 2012.
P. Li, G. Csaba, V. K. Sankar, X. S. Hu, M. Niemier, W. Porod, and G. H. Bernstein,
“Switching behavior of lithographically fabricated nanomagnets for logic applications,”
Conference on Magnetism and Magnetic Materials (MMM), Oct. 2011, Scottsdale, AZ.
M. T. Niemier, G. H. Bernstein, A. Dingler, X. S. Hu, S. Kurtz, S. Liu, J. Nahas, W. Porod, M. Siddiq, and E. Varga,
"Nanomagnet logic: Progress toward systemlevel integration,"
invited, J. of Physics: Condensed Matter., 23, 493202, 2011.
M. T. Alam, S. Kurtz, M. J. Siddiq, M. T. Niemier, G. H. Bernstein, X. S. Hu, and W. Porod,
"Onchip clocking of nanomagnet logic lines and gates,"
IEEE Trans. Nanotechnology, DOI: 10.1109/TNANO.2011.2169983.
2010
M. T. Alam, M. J. Siddiq, G. H. Bernstein, M. Niemier, W. Porod, and X. S. Hu,
“Onchip clocking for nanomagnet logic devices,”
IEEE Trans. on Nanotechnology, vol. 9(3), p. 348351, 2010.
2009
M. Alam, M. Siddiq, M. Niemier, X. S. Hu, W. Porod, and G. Bernstein,
“Fabrication of onchip clock structure for nanomagnet QCA (MQCA),”
TECHCON, Sept. 2009, Austin, TX.
Project: Architectures and benchmarking for tunnel fieldeffect transistors (TFETs) and nanomagnet logic (NML)
Principal investigators: X. Sharon Hu, Peter Kogge, Joe Nahas, Michael Niemier, Wolfgang Porod, Alan Seabaugh  Notre Dame
2010
K. Bernstein, R. Cavin, W. Porod, A. Seabaugh, and J. Welser,
"Device and architecture outlook for beyondCMOS switches,"
Proc. IEEE, vol. 98, no. 2, pp. 21692184 (2010).
A. Seabaugh,
"Emerging energyefficient device technologies vs. ultimate CMOS,"
University Governent Industry MicroNano Symposium, June 2010, West Lafayette, IN.
2009
W. Porod et al.,
“Nanomagnetic logic,”
invited, 1st Berkeley Symposium on EnergyEfficient Systems, June 2009, Berkeley, CA.
2008
M. Alam, S. Kurtz, M. Niemier, S. Hu, G. Bernstein, and W. Porod,
“Magnetic logic based on coupled nanomagnets: Clocking structures and power analysis,”
invited, IEEE NANO 2008, Aug. 2008, Arlington, TX.
03.05.13


