Publications

Conference and journal papers authored by the MIND research team.

Lateral field-effect tunnel transistors (Notre Dame)

2009

A. Seabaugh, D. Jena, T. Fang, P. Fay, S. Kabeer, T. Kosel, Y. Lu, S. Koswatta, K. Tahy, T. Vasen, D. Wheeler, H. Xing, Q. Zhang, G. Zhou, J.-M. Kuo, P. Pinsukanjana, H. Zhu, and Y.-C. Kao, “Low-subthreshold-swing tunnel transistors,” Silicon Nanoelectronics Workshop, June 2009, Kyoto, Japan.

2008

Q. Zhang, S. Sutar, T. Kosel, and A. Seabaugh, “Fully-depleted Ge interband tunnel transistor: Modeling and junction formation,” Solid State Electronics, 53, 30-35, 2008. [pdf]

Q. Zhang, T. Fang, H. Xing, A. Seabaugh, and D. Jena, “Graphene nanoribbon tunnel transistors,” IEEE Electron Device Lett., 29, 1344-1346, 2008. [pdf]

Q. Zhang and A. Seabaugh, “Can the interband tunnel FET outperform Si CMOS?,” Device Research Conf., June 2008, Santa Barbara, CA. [pdf]

Vertical heterostructure tunnel transistors (Penn State/Cornell)

2009

A. Ali, H. Madan, S. Koveshnikov, and S. Datta, “Small signal response of inversion layers in high mobility In0.53Ga0.47As MOSFETs made with thin high-k dielectrics,” ECS Trans., Symposium on High Dielectric Constant Materials and Gate Stacks, Oct. 2009, Vienna, Austria.

S. Mookerjea, R. Krishnan, S. Datta, and V. Narayanan, “On enhanced Miller capacitance effect in interband tunnel transistors,” IEEE Electron Device Lett., 30, 10, 1102-1104, Oct. 2009.

S. Mookerjea, R. Krishnan, S. Datta, and V. Narayanan, “Effective capacitance and drive current for tunnel-FET (TFET) CV/I estimation,” IEEE Trans. Electron Devices, 56, 9, 2092-2098, Sept. 2009.

S. Mookerjea and S. Datta, “Band-gap engineered hot carrier tunnel transistors,” 67th Device Research Conf. Digest, 121-122, June 2009, University Park, PA.

2008

V. Saripalli, S. Mookerjea, S. Datta, and V. Narayanan, “Ultra low power signal processing architectures,” Proc. IEEE Biomedical Circuits and Systems Conf., Nov. 2008, Baltimore, MD. [pdf]

S. Eachempati, V. Saripalli, N. Vijaykrishan, and S. Datta, “Reconfigurable BDD based quantum circuits,” IEEE/ACM Int. Symp. on Nanoscale Architectures, June 2008, Anaheim, CA. [pdf]

S. Mookerjea and S. Datta, “Comparative study of Si, Ge, and InAs based steep subthreshold slope tunnel transistors for 0.25 V supply voltage logic applications,” Device Research Conf., June 2008, Santa Barbara, CA. [pdf]

1-D nanowire tunnel transistors (Penn State)

2009

T. J. Morrow, M. Li, J. Kim, T. S. Mayer, and C. D. Keating, "Programmed assembly of DNA-coated nanowire devices," Science, 323, 352, 2009. [pdf]

Thermal management and logic circuits (Purdue/Georgia Tech)

2009

J. Hu. X. Ruan, Z. Jiang, and Y. P. Chen, “Negative differential thermal conductance in graphene nanoribbons: Toward graphene thermal circuits,” TECHCON, Sept. 2009, Austin, TX.

H. Cao, Q. Yu, I. Childres, J. Tian, S. Pei, and Y. P. Chen, “Electronic properties of large-scale graphene films chemical vapor synthesized on nickel and on copper,” TECHCON, Sept. 2009, Austin, TX.

J. Hu. X. Ruan and Y. P. Chen, “Engineering thermal conductivity in graphene nanostructures: A molecular dynamics study,” International Journal of Thermophysics (Special Issue for the 17th Symposium on Thermophysical Properties), June 2009, Boulder, CO.

J. Hu, X. Ruan, Z. Jiang, and Y. P. Chen, “Molecular dynamics calculation of thermal conductivity of graphene nanoribbons,” International Conf. on Frontiers of Characterization and metrology for Nanoelectronics, May 2009, Albany, NY.

Z. Li, E. Henriksen, Z. Jiang, Z. Hao, M. Martin, P. Kim, H. Stormer, and D. Basov, “Band structure asymmetry of bilayer graphene revealed by infrared spectroscopy,” Phys. Rev. Lett., 102, 037403, 2009.

2008

L. Weng, L. Zhang, Y. P. Chen, and L. P. Rokhinson, “Atomic force microscope local oxidation nanolithography of graphene,” Appl. Phys. Lett., 93, 093107, 2008. [pdf]

Q. Yu, J. Lian, S. Siriponglert, H. Li, Y. P. Chen, and S.-S. Pei, “Graphene segregated on Ni surfaces and transferred to insulators,” Appl. Phys. Lett., 93, 113103, 2008. [pdf]

Epitaxial spin FETs on Si (Purdue/Univ. Texas-Dallas)

2009

L. B. Biedermann, M. L. Bolen, M. A. Capano, D. Zemlyanov, and R. G. Reifenberger, “STM and XPS studies of Moir superlattices and ridges on few-layer graphene grown on 4H-SiC(000-1),” Electronic Materials Conf., June 2009, University Park, PA.

M. L. Bolen, S. E. Harrison, L. B. Biedermann, and M. A. Capano, “Few-layer graphene formation mechanisms on 4H-SiC(0001),” Electronic Materials Conf., June 2009, University Park, PA.

G. Prakash et al. “Ridges and wrinkles on few-layer epitaxial graphene grown on the carbon-face of 4H-SiC (0001),” Electronic Materials Conf., June 2009, University Park, PA.

A. Pirkle, Y. J. Chabal, L. Colombo, and R. M. Wallace, “In-situ studies of high-k dielectrics for graphene-based devices,” ECS Trans. 19(5), 215 2009.

G. Lee, C. Gong, A. Pirkle, A. Venugopal, B. Lee, S.Y. Park, L. Goux, M. Acik, R. Guzman, Y. Chabal, J. Kim, E. M. Vogel, R. M. Wallace, M. J. Kim, L. Colombo, and K. Cho “Materials science of graphene for novel device applications,” ECS Trans. 19(5), 185 2009.

A. Venugopal, A. Pirkle, R. M. Wallace, L. Colombo, and E. M. Vogel, “Contact resistance studies of metal on HOPG and graphene stacks,” Proceedings of the Int. Conf. on Frontiers of Characterization and Metrology for Nanoelectronics, May 2009, Albany, NY.

B. Lee, G. Mordi, T. J. Park, L. Goux, Y. J. Chabal, K. J. Cho, E. M. Vogel, M. J. Kim, L. Colombo, R. M. Wallace, and J. Kim, “Atomic-layer-deposited Al2O3 as gate dielectrics for graphene-based devices,” ECS Trans. 19(5), 225, 2009.

L. Biedermann, M. Bolen, M. Capano, D. Zemlyanov, and R. Reifenberger, “Insights into few-layer epitaxial graphene growth on 4H-SiC(000-1) substrates from STM studies,” Phys. Rev. B, 79, 125411, 2009.

2008

T. Shen, Y. Q. Wu, M. A. Capano, L. P. Rokhinson, L. W. Engel, and P. D. Ye, “Magnetoconductance oscillations in graphene antidot arrays,” Appl Phys. Lett., 93, 122102, 2008. [pdf]

Extremely-scaled gated tunnel transistors (Notre Dame)

2009

D. Jena, “A theory for the high-field current-carrying capacity of 1D semiconductors”, J. Appl. Phys., 105, 123701 2009.

K. Tahy, D. Shilling, T. Zimmermann, H. Xing, P. Fay, Luxmi, R. Feenstra, and D. Jena, “Gigahertz operation of epitaxial graphene transistors,” Device Research Conf., June 2009, University Park, PA.

K. Tahy, S. Koswatta, T. Fang, Q. Zhang, H. Xing, and D. Jena, “High-field transport properties of 2D and nanoribbon graphene FETs,” Device Research Conf., June 2009, University Park, PA.

2008

T. Fang, A. Konar, H. Xing, and D. Jena, “Mobility in semiconducting graphene nanoribbons: Phonon, impurity, and edge roughness scattering,” Phys. Rev. B, 78, 205403, 2008. [pdf]

X. Luo, Y. Lee, A. Konar, T. Fang, G. Xing, G. Snider, and D. Jena, “Current-carrying capacity of long and short channel 2D graphene transistors,” Device Research Conf., June 2008, Santa Barbara, CA. [pdf]

D. Jena, T. Fang, Q. Zhang, and G. Xing, “Zener tunneling in semiconducting nanotube and graphene nanoribbon p-n junctions,” Appl. Phys. Lett., 93, 112106, 2008. [pdf]

T. Fang, A. Konar, G. Xing, and D. Jena, “Carrier Statistics and Quantum Capacitance of Graphene Sheets and Ribbons,” Appl. Phys. Lett., 91, 092109, 2007. [pdf]

Energy dissipation in nonequilibrium systems (Illinois)

2009

J. Lee, A. Liao, E. Pop, and W. King, “Electrical and thermal coupling to a single-wall carbon nanotube device using an electrothermal nanoprobe,” Nano Lett., 9, 1356, 2009.

Y. Zhao, A. Liao, and E. Pop, “Multi-band mobility model for semiconducting carbon nanotubes,” IEEE Electron Device Lett., 30, 10, Oct. 2009.

F. Xiong, A. Liao, K. Darmawikarta, J. Abelson, and E. Pop, “Chalcogenide phase change induced with carbon nanotube heaters,” TECHCON, Sept. 2009, Austin, TX.

B. Ramasubramanian and E. Pop, “Comparison of energy relaxation in one-dimensional thermionic and tunneling transistors,” IEEE NANO, July 2009, Genoa, Italy.

A. Liao, F. Xiong, K. Darmawikarta, J. Abelson, and E. Pop, “Chalcogenide phase change induced with single-wall carbon nanotube heaters,” Device Research Conf., June 2009, University Park, PA.

D. Estrada, S. Dutta, A. Liao, and E. Pop, “Reduction of hysteresis in mobility measurements of carbon nanotube transistors by pulsed I-V characterization,” Device Research Conf., June 2009, University Park, PA.

2008

A. Liao, Y. Zhao, and E. Pop, "Avalanche-induced current enhancement in semiconducting carbon nanotubes," Phys. Rev. Lett., 101, 256804, 2008. [pdf]

E. Pop, “The role of electrical and thermal contact resistance for Joule breakdown of single-wall carbon nanotubes,” Nanotechnology, 19, 295202, 2008. [pdf]

A. Liao and E. Pop, “Impact ionization in semiconducting single-wall carbon nanotubes,” Device Research Conf., June 2008, Santa Barbara, CA. [pdf]

3-D quantum transport modeling (Purdue)

2009

M. Luisier and G. Klimeck, “Performance analysis of statistical samples of graphene nanoribbon tunneling transistors with line edge roughness,” Appl. Phys. Lett., 94, 223505, 2009.

M. Luisier and G. Klimeck, “Performance limitations of graphene nanoribbon tunneling FETS due to line edge roughness,” accepted, Device Research Conf., June 2009, University Park, PA.

A. Paul, S. Mehrotra, G. Klimeck, and M. Luisier, “On the validity of the top of the barrier quantum transport model for ballistic nanowire MOSFETs,” IEEE Proceedings of the 13th International Workshop on Computational Electronics, May 2009, Beijing, China.

S. Mehrotra M. Luisier, and G Klimeck, “Surface and orientation dependence on performance of trigated silicon nanowire pMOSFETs,” Proceedings for the 7th IEEE Workshop on Microelectronics and Electron Devices, Apr. 2009, Boise, ID.

2008

M. Luisier, N. Neophytou, N. Kharche, and G. Klimeck, “Full-band and atomistic simulation of realistic 40nm InAs HEMT,” IEEE Int. Electron Devices Meeting, Dec. 2008, San Francisco, CA. [pdf]

G. Klimeck and M. Luisier, “From NEMO1D and NEMO3D to OMEN: Moving toward atomistic 3D quantum transport in nano-scale semiconductors,” IEEE Int. Electron Devices Meeting, Dec. 2008, San Francisco, CA. [pdf]

Nanomagnet logic devices (Notre Dame)

2009

M. Alam, G. Bernstein, A. Dingler, X. S. Hu, M. T. Niemier, W. Porod, and M. Siddiq, “Controlling magnet circuits: How clock structure implementation will impact power and correctness,” submitted, IEEE Int. Symposium on Defect and Fault Tolerance in VLSI Systems, Oct. 2009, Chicago, IL.

M. Alam, M. Siddiq, M. Niemier, X. S. Hu, W. Porod, and G. Bernstein, “Fabrication of on-chip clock structure for nanomagnet QCA (MQCA),” TECHCON, Sept. 2009, Austin, TX.

A. Dingler, M. Niemier, S. Hu, M. Alam, and M. Garrison, “System-level energy and performance projections for nanomagnet-based logic,” IEEE Symposium on Nanoscale Architectures, July 2009, San Francisco, CA.

E. Varga, M. Niemier, G. Bernstein, W. Porod, and S. Hu, “Non-volatile and reprogrammable MCQA-based majority gates,” Device Research Conf., June 2009, University Park, PA.

2008

M. Niemier, M. Crocker, and S. Hu, “Fabrication variations and defect tolerance for nanomagnet-based QCA,” 23rd IEEE Int. Symp. on Defect and Fault Tolerance in VLSI Systems, Oct. 2008, Cambridge, MA. [pdf]

M. Niemier, A. Dingler, S. Hu, M. Alam, G. Bernstein, and W. Porod, “Bridging the gap between nanomagnetic devices and circuits,” 26th IEEE Int. Conf. on Computer Design, Oct. 2008, pp. 506-513, Lake Tahoe, CA. [pdf]

M. Niemier, A. Dingler, and S. Hu, “Design tradeoffs for improved performance in MQCA-based systems,” 1st IEEE Int. Workshop on Design and Test of Nano Devices, Circuits and Systems, Sept. 2008, pp. 35-38, Cambridge, MA. [pdf]

M. Crocker, S. Hu, and M. Niemier, “Defect tolerance in QCA-based PLAs,” IEEE/ACM Int. Symp. on Nanoscale Architectures, June 2008, pp. 46-53, Anaheim, CA. [pdf]

THz logic using plasmonics (Michigan)

2009

K. Song and P. Mazumder, “Active Tera Hertz (THz) spoof surface plasmon polariton (SPP) switch comprising the perfect conductor meta-material,” IEEE Nano 2009 Conference, July 2009, Genoa, Italy.

Architectures for emerging NRI devices (Notre Dame)

2009

W. Porod et al., (Invited), “Nanomagnetic logic,” 1st Berkeley Symposium on Energy-Efficient Systems, June 2009, Berkeley, CA.

2008

M. Alam, S. Kurtz, M. Niemier, S. Hu, G. Bernstein, and W. Porod, “Magnetic logic based on coupled nanomagnets: Clocking structures and power analysis,” invited paper, IEEE NANO 2008, Aug. 2008, Arlington, TX. [pdf]