Tuesday, August 18, 2009
University of Notre Dame • McKenna Hall
8:00 a.m. - 8:30 p.m.

Organizers
Wolfgang Porod, University of Notre Dame
Kerry Bernstein, Applied Research Associates

Sponsors
National Science Foundation, University of Notre Dame, MIND, and the SRC's Nanoelectronics Research Initiative.

OVERVIEW

This one-day event will examine how emerging post-CMOS switches studied in the Nanoelectronics Research Initiative can be used most effectively in design – a timely topic given the profound challenges of scaling conventional CMOS. By exploring alternatives to Boolean logic expressed in conventional static combinatorial CMOS circuits, the workshop will motivate and inspire researchers to identify logic functions accelerated in hardware by idiosyncrasy in specific post-CMOS devices. New switch architectures may solve problems that CMOS either cannot address or attempts to do in a most cumbersome way. The workshop will also include an interim readout of the NRI emerging switches architecture benchmarking effort.

Downloads — workshop flier [pdf] | workshop agenda [pdf]

TOPICS and SPEAKERS

NRI – Computing of the future | abstract | slides
Larry Cooper, Arizona State University

Communication of novel computational state variables: Physical limits and circuit implications | abstract
Azad Naeemi and James Meindl, Georgia Institute of Technology

Parallel processing and circuit design with nano-electro-mechanical relays | abstract | slides
Elad Alon, University of California, Berkeley

CMOS++: Opportunities for magnetic materials in on-chip power management | abstract
Ken Shepard, Columbia University

Stochastic logic | abstract | slides
David Ricketts, Carnegie Mellon University

Stable learning in networks of unreliable, memristive nanodevices | abstract | slides
Greg Snider, Hewlett-Packard

Architectural design for "noisy" fabrication | abstract | slides
André DeHon, University of Pennsylvania

Virtual and physical cellular machines | abstract | slides
Tamas Roska, Hungarian Academy of Sciences

Brains, artificial neural networks, and some future hardware issues | abstract | slides
Ralph Linsker, IBM T.J. Watson Research Center

Biologically inspired intelligent signal processing | abstract | slides
Dan Hammerstrom, Portland State University

Stochastic computational associative memories: Neuromorphic architectures beyond Moore's Law | abstract | slides
Andreas Andreou, Johns Hopkins University

NRI benchmarking
Kerry Bernstein, Applied Research Associates

09.14.09